1. Field of the Invention
The present invention relates to a manufacturing method for a semiconductor device having a semiconductor element formed by laminating a semiconductor layer and an insulating layer on a substrate having an insulating surface. In particular, the present invention relates to a technique effectively applied to a manufacturing method for a semiconductor device in which a substrate is made of a raw material that is thermally fragile, such as glass.
Also, the present invention relates to a heat treatment method in which heat treatment is conducted through irradiation of an incoherent electromagnetic wave within a wavelength band ranging at least from a visible light band to an infrared band. In particular, the present invention relates to a technique effectively applicable to a case of using a substrate made of a raw material with a low heat resistance temperature, such as glass.
2. Description of the Related Art
In recent years, a technique has been developed, which is for manufacturing a thin film transistor (TFT) using a glass substrate by using polycrystalline silicon obtained through crystallization by laser annealing. The glass substrate used for such applications is made of materials such as barium borosilicate glass and aluminosilicate glass with a distortion point of 700° C. or lower. Accordingly, an allowable maximum temperature in a manufacturing process for the TFT should be set as a temperature which is not more than the distortion point and at which the glass substrate does not deform. Thus, a growing importance is placed on laser annealing or rapid thermal annealing (RTA) technique for use in crystallization of silicon or activation of donor or acceptor impurities doped into silicon.
RTA is a heat treatment technique for rapidly heating a target for a period of several microseconds to several ten seconds. This technique is for annealing while using the electromagnetic wave within the wavelength band ranging from the visible light band to the infrared band, which is radiated form a halogen lamp or the like. As a technique of activating an n-type impurity injected into a polycrystalline silicon film on the glass substrate using the RTA technique, disclosed in, for example, JP 2001-102585 A (see pp. 5–6, FIG. 1) is a method of accumulating heat in a metal layer formed between the glass substrate and the polycrystalline silicon film in order to enable effective action of the heat generated by RTA.
By the way, in a technique of manufacturing a MOS transistor on a single crystal silicon substrate, a thermal oxidation film obtained by oxidizing a silicon surface at a temperature of 900° C. or higher is effectively used. On the other hand, the above-mentioned glass substrate deforms (changes its size or warps due to contraction) when being subjected to the heat treatment at a high temperature. Depending on the design rule of an integrated circuit, such deformation may cause trouble in a light exposure process where a highly accurate mask alignment is required in the order of submicron. That is, a position at which a gate electrode overlaps with a semiconductor layer or a relative position of contact holes is shifted, which makes it impossible to complete an element with a size defined at an initial design stage. The effects of such a problem become more remarkable as high-density packaging of the integrated circuit proceeds (as miniaturization of the element proceeds).
However, plasma CVD or sputtering involves a reaction using a plasma. The following disadvantages are thus pointed out. That is, a film formation surface is damaged by a high-energy particle in the plasma, so that defects or pinholes develop in the deposited film, or a large number of fixed charges or interface levels are caused therein. In addition, the film contains several atoms % of hydrogen and thus, thermal stability falls. Further, the hydrogen in the film dissociates at a relatively low temperature, which causes unstable element characteristics.
In contrast, according as the miniaturization of the integrated circuit formed using the TFT proceeds, a gate insulating film should be made thin based on the scaling law. In other words, even if only the planar TFT size is reduced while maintaining a thickness of the gate insulating film, a variation in characteristics increases. Further, a driving power of the TFT does not increase. As a result, the device using such TFTs cannot attain high performance.
However, in a silicon oxide film or silicon nitride film obtained through deposition at just a temperature of 400° C. or lower, unlike in a clean thermal oxidation film obtained by oxidizing the silicon at a temperature of 900° C. or higher, the influence of the fixed charge or interface level density becomes conspicuous. As a result, the reduction in variation of threshold voltage or gate leak cannot be substantially realized.
In modifying the film material through the heat treatment, if the modification is based on a thermal activation reaction, the heat treatment effect can be exerted at a higher temperature. However, as disclosed in JP 2001-102585 A, in the method of accumulating the heat in the metal film formed between the glass substrate and the polycrystalline silicon film, any limitation is imposed on an element shape. Further, effective heat treatment cannot be performed on sites for which the heat treatment really needs to be performed. For example, it is impossible to effectively modify the gate insulating film formed on the semiconductor layer by the heat treatment.